RE: [PATCH 2/2] EDAC/igen6: Add polling support

[Zhuo, Qiuxu]

Hi Orange,

There are two things to do:

  1) Set ' edac_op_state' correctly (preparation work).
       This is provided as a separate patch in [1].

  2) Add polling mode support (your current patch).
       Please incorporate [2] into your current patch and update
       your current patch on top of [1] with the comments below.

Eventually, there will be 3 patches in your series. Could you please
re-send all these 3 patches after you resolve the comments below?

If any questions, feel free to let me know. Thanks!

TIP: the command below can quickly provide you with useful comments for your patch. 

    ${LINUX}/scripts/checkpatch.pl --strict   <your patch>

> From: Orange Kao <orange@xxxxxxxx>
> [...]
> 
> I have a PC with Intel N100 (with PCI device 8086:461c, DID_ADL_N_SKU4) but
> interrupt does not seems to work, even with the following configuration in
> BIOS. I am not sure if this is caused by a BIOS bug or not.

Tweak this commit message a bit as below:

  Some PCs with Intel N100 (with PCI device 8086:461c, DID_ADL_N_SKU4)
  experienced issues with error interrupts not working, even with the following 
  configuration in the BIOS.

> 
>     In-Band ECC Support: Enabled
>     In-Band ECC Operation Mode: 2 (make all requests protected and
>                                   ignore range checks)
>     IBECC Error Injection Control: Inject Correctable Error on insertion
>                                    counter
>     Error Injaction Insertion Count: 251658240 (0xf000000)

s/Injaction/Injection

> 
> This commit tried to add polling support.

Tweak this sentence a bit as below:

  Add polling mode support for these machines to ensure that memory error
  events are handled.

Also append your "Signed-off-by:" tag here.

> ---
>  drivers/edac/igen6_edac.c | 23 ++++++++++++++++++++++-
>  1 file changed, 22 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c index
> 07dacf8c10be..5027070410a5 100644
> --- a/drivers/edac/igen6_edac.c
> +++ b/drivers/edac/igen6_edac.c
> @@ -1170,6 +1170,19 @@ static int igen6_pci_setup(struct pci_dev *pdev,
> u64 *mchbar)
>  	return -ENODEV;
>  }
> 
> +static void igen6_check(struct mem_ctl_info *mci) {
> +	struct igen6_imc *imc = mci->pvt_info;
> +
> +	/* errsts_clear() isn't NMI-safe. Delay it in the IRQ context */
> +	u64 ecclog = ecclog_read_and_clear(imc);
> +	if (!ecclog)
> +		return;

Add a blank line here.

> +	if (!ecclog_gen_pool_add(imc->mc, ecclog))
> +		irq_work_queue(&ecclog_irq_work);
> +
> +}
> +
>  static int igen6_register_mci(int mc, u64 mchbar, struct pci_dev *pdev)  {
>  	struct edac_mc_layer layers[2];
> @@ -1211,6 +1224,9 @@ static int igen6_register_mci(int mc, u64 mchbar,
> struct pci_dev *pdev)
>  	mci->edac_cap = EDAC_FLAG_SECDED;
>  	mci->mod_name = EDAC_MOD_STR;
>  	mci->dev_name = pci_name(pdev);
> +	if (edac_op_state == EDAC_OPSTATE_POLL) {
> +		mci->edac_check = igen6_check;
> +	}
>  	mci->pvt_info = &igen6_pvt->imc[mc];
> 
>  	imc = mci->pvt_info;
> @@ -1450,7 +1466,9 @@ static int __init igen6_init(void)
>  	if (owner && strncmp(owner, EDAC_MOD_STR,
> sizeof(EDAC_MOD_STR)))
>  		return -EBUSY;
> 
> -	edac_op_state = EDAC_OPSTATE_NMI;
> +	if (edac_op_state == EDAC_OPSTATE_INVAL) {
> +		edac_op_state = EDAC_OPSTATE_NMI;
> +	}

These 4 diffs are not needed after the separate patch [1].

>  	rc = pci_register_driver(&igen6_driver);
>  	if (rc)
> @@ -1474,3 +1492,6 @@ module_exit(igen6_exit);  MODULE_LICENSE("GPL
> v2");  MODULE_AUTHOR("Qiuxu Zhuo");  MODULE_DESCRIPTION("MC Driver
> for Intel client SoC using In-Band ECC");
> +
> +module_param(edac_op_state, int, 0444);
> MODULE_PARM_DESC(edac_op_state,
> +"EDAC Error Reporting state: 0=Poll,1=NMI. Default=1");

The driver now supports polling mode or detects it based on the configuration mode. 
Please replace this line with the one in [2] accordingly. 

> --
> 2.47.0

=======

[1]