Re: [PATCH] PCI: j721e: Deassert PERST# after a delay of PCIE_T_PVPERL_MS ms

[Krzysztof Wilczyński]

Hello,

> According to Section 2.2 of the PCI Express Card Electromechanical
> Specification (Revision 5.1), in order to ensure that the power and the
> reference clock are stable, PERST# has to be deasserted after a delay of
> 100 milliseconds (TPVPERL). Currently, it is being assumed that the power
> is already stable, which is not necessarily true. Hence, change the delay
> to PCIE_T_PVPERL_MS to guarantee that power and reference clock are stable.
[...]
> This patch is based on commit
> c2ee9f594da8 KVM: selftests: Fix build on on non-x86 architectures
> of Mainline Linux.

Why KVM?  Do you have the link to this commit handy?

[...]
>  		if (pcie->reset_gpio) {
> -			fsleep(PCIE_T_PERST_CLK_US);
> +			msleep(PCIE_T_PVPERL_MS);

fsleep() with the same macro and for the same reason is also used in the
j721e_pcie_probe() callback.  I think, we would want both changed.

	Krzysztof