Re: [PATCH] counter: stm32-timer-cnt: Add check for clk_enable()

[William Breathitt Gray]

On Sun, Nov 03, 2024 at 06:25:02PM +0000, Jiasheng Jiang wrote:
> From: Jiasheng Jiang <jiashengjiangcool@xxxxxxxxxxx>
> 
> Add check for the return value of clk_enable() in order to catch the
> potential exception.
> 
> Fixes: c5b8425514da ("counter: stm32-timer-cnt: add power management support")
> Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder")
> Signed-off-by: Jiasheng Jiang <jiashengjiangcool@xxxxxxxxxxx>
> ---
>  drivers/counter/stm32-timer-cnt.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-timer-cnt.c
> index 186e73d6ccb4..0593c9b73992 100644
> --- a/drivers/counter/stm32-timer-cnt.c
> +++ b/drivers/counter/stm32-timer-cnt.c
> @@ -214,11 +214,15 @@ static int stm32_count_enable_write(struct counter_device *counter,
>  {
>  	struct stm32_timer_cnt *const priv = counter_priv(counter);
>  	u32 cr1;
> +	int ret;
>  
>  	if (enable) {
>  		regmap_read(priv->regmap, TIM_CR1, &cr1);
> -		if (!(cr1 & TIM_CR1_CEN))
> -			clk_enable(priv->clk);
> +		if (!(cr1 & TIM_CR1_CEN)) {
> +			ret = clk_enable(priv->clk);
> +			if (ret)
> +				return ret;
> +		}
>  
>  		regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
>  				   TIM_CR1_CEN);
> @@ -816,7 +820,9 @@ static int __maybe_unused stm32_timer_cnt_resume(struct device *dev)
>  		return ret;
>  
>  	if (priv->enabled) {
> -		clk_enable(priv->clk);
> +		ret = clk_enable(priv->clk);
> +		if (ret)
> +			return ret;
>  
>  		/* Restore registers that may have been lost */
>  		regmap_write(priv->regmap, TIM_SMCR, priv->bak.smcr);
> -- 
> 2.25.1

It's not necessarily clear that an error in the count_enable_write()
callback or cnt_resume() callback is due to a clk_enable() failure. You
should call dev_err before returning to indicate the reason for the
error code.

William Breathitt Gray

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