[PATCH net-next 1/2] rtase: Add support for RTL907XD-VA PCIe port

From: Justin Lai
Date: Sun Nov 10 2024 - 21:56:55 EST


Add RTL907XD-VA hardware version and modify the speed reported by
.get_link_ksettings in ethtool_ops.

Signed-off-by: Justin Lai <justinlai0215@xxxxxxxxxxx>
---
drivers/net/ethernet/realtek/rtase/rtase.h | 10 +++++--
.../net/ethernet/realtek/rtase/rtase_main.c | 26 ++++++++++++++-----
2 files changed, 28 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ethernet/realtek/rtase/rtase.h b/drivers/net/ethernet/realtek/rtase/rtase.h
index 583c33930f88..2bbfcad613ab 100644
--- a/drivers/net/ethernet/realtek/rtase/rtase.h
+++ b/drivers/net/ethernet/realtek/rtase/rtase.h
@@ -9,7 +9,11 @@
#ifndef RTASE_H
#define RTASE_H

-#define RTASE_HW_VER_MASK 0x7C800000
+#define RTASE_HW_VER_MASK 0x7C800000
+#define RTASE_HW_VER_906X_7XA 0x00800000
+#define RTASE_HW_VER_906X_7XC 0x04000000
+#define RTASE_HW_VER_907XD_V1 0x04800000
+#define RTASE_HW_VER_907XD_VA 0x08000000

#define RTASE_RX_DMA_BURST_256 4
#define RTASE_TX_DMA_BURST_UNLIMITED 7
@@ -170,7 +174,7 @@ enum rtase_registers {
RTASE_INT_MITI_TX = 0x0A00,
RTASE_INT_MITI_RX = 0x0A80,

- RTASE_VLAN_ENTRY_0 = 0xAC80,
+ RTASE_VLAN_ENTRY_0 = 0xAC80,
};

enum rtase_desc_status_bit {
@@ -327,6 +331,8 @@ struct rtase_private {
u16 int_nums;
u16 tx_int_mit;
u16 rx_int_mit;
+
+ u32 hw_ver;
};

#define RTASE_LSO_64K 64000
diff --git a/drivers/net/ethernet/realtek/rtase/rtase_main.c b/drivers/net/ethernet/realtek/rtase/rtase_main.c
index f8777b7663d3..73ebdf0bc376 100644
--- a/drivers/net/ethernet/realtek/rtase/rtase_main.c
+++ b/drivers/net/ethernet/realtek/rtase/rtase_main.c
@@ -1714,10 +1714,22 @@ static int rtase_get_settings(struct net_device *dev,
struct ethtool_link_ksettings *cmd)
{
u32 supported = SUPPORTED_MII | SUPPORTED_Pause | SUPPORTED_Asym_Pause;
+ const struct rtase_private *tp = netdev_priv(dev);

ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
supported);
- cmd->base.speed = SPEED_5000;
+
+ switch (tp->hw_ver) {
+ case RTASE_HW_VER_906X_7XA:
+ case RTASE_HW_VER_906X_7XC:
+ cmd->base.speed = SPEED_5000;
+ break;
+ case RTASE_HW_VER_907XD_V1:
+ case RTASE_HW_VER_907XD_VA:
+ cmd->base.speed = SPEED_10000;
+ break;
+ }
+
cmd->base.duplex = DUPLEX_FULL;
cmd->base.port = PORT_MII;
cmd->base.autoneg = AUTONEG_DISABLE;
@@ -1974,13 +1986,15 @@ static void rtase_init_software_variable(struct pci_dev *pdev,

static bool rtase_check_mac_version_valid(struct rtase_private *tp)
{
- u32 hw_ver = rtase_r32(tp, RTASE_TX_CONFIG_0) & RTASE_HW_VER_MASK;
bool known_ver = false;

- switch (hw_ver) {
- case 0x00800000:
- case 0x04000000:
- case 0x04800000:
+ tp->hw_ver = rtase_r32(tp, RTASE_TX_CONFIG_0) & RTASE_HW_VER_MASK;
+
+ switch (tp->hw_ver) {
+ case RTASE_HW_VER_906X_7XA:
+ case RTASE_HW_VER_906X_7XC:
+ case RTASE_HW_VER_907XD_V1:
+ case RTASE_HW_VER_907XD_VA:
known_ver = true;
break;
}
--
2.34.1