Re: [PATCH v8 5/5] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100

[Qiang Yu]

On 11/13/2024 1:29 AM, Johan Hovold wrote:
> On Mon, Nov 11, 2024 at 11:44:17AM +0800, Qiang Yu wrote:
> > On 11/5/2024 1:28 PM, Qiang Yu wrote:
> > > On 11/4/2024 10:35 PM, Johan Hovold wrote:
> > > > On Thu, Oct 31, 2024 at 08:09:02PM -0700, Qiang Yu wrote:
> > > > > +            ranges = <0x01000000 0x0 0x00000000 0x0 0x78200000 0x0
> > > > > 0x100000>,
> > > > > +                 <0x02000000 0x0 0x78300000 0x0 0x78300000 0x0
> > > > > 0x3d00000>,
> > > > Can you double check the size here so that it is indeed correct and not
> > > > just copied from the other nodes which initially got it wrong:
> > > >
> > > >      https://lore.kernel.org/lkml/20240710-topic-barman-v1-1-5f63fca8d0fc@xxxxxxxxxx/
> > BTW, regions of PCIe6a, PCIe4, PCIe5 are 64MB, 32MB, 32MB, respectively.
> > Why range size is set to 0x1d00000 for PCIe6a, any issue is reported on
> > PCIe6a?
> Thanks for checking. It seems the patch linked to above was broken for
> PCIe6a then.
>
> We did see PCIe5 probe breaking due to the overlap with PCIe4 but the
> patch predates PCIe5 support being posted and merged so it was probably
> just based on inspection.
>
> Could you send a fix for PCIe6a?
Sure, will send the fix.

Thanks,
Qiang Yu
> Johan