Re: [PATCH v3 5/5] i3c: dw: Add quirk to address OD/PP timing issue on AMD platform

From: Jarkko Nikula
Date: Thu Nov 14 2024 - 03:02:19 EST


On 11/8/24 9:33 AM, Shyam Sundar S K wrote:
The AMD Legacy I3C is having a problem with its IP, specifically with the
push-pull and open-drain pull-up registers. These registers need to be
manually programmed for every CCC submission to align with the duty cycle.
Therefore, add a quirk to address this issue.

Co-developed-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
Signed-off-by: Sanket Goswami <Sanket.Goswami@xxxxxxx>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@xxxxxxx>
---
drivers/i3c/master/dw-i3c-master.c | 29 ++++++++++++++++++++++++++++-
drivers/i3c/master/dw-i3c-master.h | 1 +
2 files changed, 29 insertions(+), 1 deletion(-)

Reviewed-by: Jarkko Nikula <jarkko.nikula@xxxxxxxxxxxxxxx>