[PATCH v3 0/2] Enable SDHC1 and SDHC2 on QCS615
From: Yuanjie Yang
Date: Fri Nov 22 2024 - 01:52:10 EST
Add SDHC1 and SDHC2 support to the QCS615 Ride platform. The
SDHC1 and SDHC2 of QCS615 are derived from SM6115. Include
the configuration of SDHC1-related and SDHC2-related opp,
power, and interconnect settings in the device tree.
Signed-off-by: Yuanjie Yang <quic_yuanjiey@xxxxxxxxxxx>
---
This patch series depends on below patch series:
https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@xxxxxxxxxxx/
https://lore.kernel.org/all/20241105032107.9552-1-quic_qqzhou@xxxxxxxxxxx/
Changes in v3:
- Improve the commit messages and cover letter
- Link to v2: https://lore.kernel.org/all/20241106072343.2070933-1-quic_yuanjiey@xxxxxxxxxxx/
Changes in v2:
- Improve the commit messages and cover letter
- Remove applied patches 1
- Pad sdhc_1 node and sdhc_2 node register addresses to 8 hex digits
- Adjust sdhc_1 node and sdhc_2 node register addresses to hexadecimal
- Modify sdhc_2 vqmmc-supply incorrect power configuration
- Link to v1: https://lore.kernel.org/all/20241023092708.604195-1-quic_yuanjiey@xxxxxxxxxxx/
---
Yuanjie Yang (2):
arm64: dts: qcom: qcs615: add SDHC1 and SDHC2
arm64: dts: qcom: qcs615-ride: Enable SDHC1 and SDHC2
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 31 ++++
arch/arm64/boot/dts/qcom/qcs615.dtsi | 198 +++++++++++++++++++++++
2 files changed, 229 insertions(+)
--
2.34.1