Re: [PATCH] clk: qcom: gcc-x1e80100: Fix USB 0 and 1 PHY GDSC pwrsts flags
From: Konrad Dybcio
Date: Mon Dec 02 2024 - 09:56:15 EST
On 15.08.2024 10:40 PM, Bjorn Andersson wrote:
>
> On Thu, 01 Aug 2024 13:21:07 +0300, Abel Vesa wrote:
>> Allowing these GDSCs to collapse makes the QMP combo PHYs lose their
>> configuration on machine suspend. Currently, the QMP combo PHY driver
>> doesn't reinitialise the HW on resume. Under such conditions, the USB
>> SuperSpeed support is broken. To avoid this, mark the pwrsts flags with
>> RET_ON. This is in line with USB 2 PHY GDSC config.
Your commit text suggests adding simple system pm ops which
essentially re-run phy_init would fix the issue as well.
The docs say the PHY can retain state even throughout a CX
collapse, so this seems like a band-aid over a small cut.
Konrad