Re: [PATCH v7 09/12] x86/process: Clear hardware feedback history for AMD processors

[Dave Hansen]

On 11/30/24 06:07, Mario Limonciello wrote:
> --- a/arch/x86/kernel/process_64.c
> +++ b/arch/x86/kernel/process_64.c
> @@ -709,6 +709,10 @@ __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
>  	/* Load the Intel cache allocation PQR MSR. */
>  	resctrl_sched_in(next_p);
>  
> +	/* Reset hw history on AMD CPUs */
> +	if (cpu_feature_enabled(X86_FEATURE_AMD_WORKLOAD_CLASS))
> +		wrmsrl(AMD_WORKLOAD_HRST, 0x1);
> +
>  	return prev_p;

Could we do a little refactoring here, please?  This, plus the
resctrl_sched_in() is sure starting to look like a pattern.  It would be
nice to have a single, common function that 32-bit and 64-bit call at
the end of __switch_to().

The X86_BUG_SYSRET_SS_ATTRS hunk can probably go in there too.