[PATCH v1 3/3] arm64: dts: qcom: sdm845-db845c: add i2s playback support via LS1 connector

[Alexey Klimov]

DB845c board (RB3 board) has i2s signals exported via the first low-speed
connector and this is also required by 96boards specification. Enable
playback support via this connector. Since this is specific only to DB845c
board the pins configuration is also in this board-specific file only.

This playback output is fixed to 16bit, i2s format and 48 kHz and works
with simple DACs.

It was verified with the following commands:
amixer -c0 cset iface=MIXER,name='SEC_MI2S_RX Audio Mixer MultiMedia3' 1
SDL_AUDIODRIVER="alsa" AUDIODEV="hw:0,2" ffplay -autoexit test.mp3

Signed-off-by: Alexey Klimov <alexey.klimov@xxxxxxxxxx>
---
 arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 43 +++++++++++++++++++++-
 1 file changed, 41 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
index 1cc0f571e1f7..6ca719281788 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
+++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts
@@ -707,12 +707,21 @@ led@5 {
 	};
 };
 
-/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
 &q6afedai {
+	/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
 	dai@22 {
 		reg = <QUATERNARY_MI2S_RX>;
 		qcom,sd-lines = <0 1 2 3>;
 	};
+
+	/*
+	 * Secondary I2S uses 1 I2S SD Line for audio playback on
+	 * LT9611 HDMI Bridge
+	 */
+	dai@18 {
+		reg = <SECONDARY_MI2S_RX>;
+		qcom,sd-lines = <0>;
+	};
 };
 
 &q6asmdai {
@@ -762,7 +771,8 @@ &sound {
 			 &quat_mi2s_sd0_active
 			 &quat_mi2s_sd1_active
 			 &quat_mi2s_sd2_active
-			 &quat_mi2s_sd3_active>;
+			 &quat_mi2s_sd3_active
+			 &sec_mi2s_active>;
 	pinctrl-names = "default";
 	model = "DB845c";
 	audio-routing =
@@ -852,6 +862,17 @@ codec {
 			sound-dai = <&wcd9340 1>;
 		};
 	};
+
+	i2s-sec-dai-link {
+		link-name = "I2S LS1 Playback";
+		cpu {
+			sound-dai = <&q6afedai SECONDARY_MI2S_RX>;
+		};
+
+		platform {
+			sound-dai = <&q6routing>;
+		};
+	};
 };
 
 &spi0 {
@@ -994,6 +1015,24 @@ reset-n-pins {
 		};
 	};
 
+	sec_mi2s_active: sec-mi2s-active {
+		clk-pins {
+			/* sclk and ws */
+			pins = "gpio80", "gpio81";
+			function = "sec_mi2s";
+			drive-strength = <8>;
+			bias-disable;
+			output-high;
+		};
+
+		data-pins {
+			pins = "gpio82", "gpio83";
+			function = "sec_mi2s";
+			drive-strength = <8>;
+			bias-disable;
+		};
+	};
+
 	sdc2_default_state: sdc2-default-state {
 		clk-pins {
 			pins = "sdc2_clk";
-- 
2.45.2