Re: [PATCH v5 2/4] arm64: dts: exynos: Add initial support for Samsung Galaxy S20 Series boards (hubble)

From: Ivaylo Ivanov
Date: Fri Dec 06 2024 - 11:19:37 EST


On 12/6/24 17:41, Umer Uddin wrote:
> Add initial support for the Samsung Galaxy S20 Series (hubble) phones.
> They were launched in 2020, and are based on the Exynos 990 SoC.
> The devices have multiple RAM configurations,

A very small nit that I've noticed repeatedly in the other 990
commits as well:

In the future, try to wrap commit message according to Linux coding
style / submission process - neither too early nor over the limit, so
that commit messages can look as good as they can:

https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

For example, in this particular case, you could move "starting from
8GB" to the previous line, like so:

...
They were launched in 2020, and are based on the Exynos 990 SoC.
The devices have multiple RAM configurations, starting from 8GB
going all the way up to 16GB For the S20 Ultra devices.

Otherwise, it looks good to me.

Best regards, Ivo.

> starting from 8GB going all the way up to 16GB for the S20 Ultra devices.
>
> This device tree adds support for the following:
>
> - SimpleFB
> - 8GB RAM (Any more will be mapped in device trees)
> - Buttons
>
> Signed-off-by: Umer Uddin <umer.uddin@xxxxxxxxxxxxxxxxxxxxxxxxxx>
> ---
> .../boot/dts/exynos/exynos990-x1s-common.dtsi | 98 +++++++++++++++++++
> 1 file changed, 98 insertions(+)
> create mode 100644 arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi
> new file mode 100644
> index 000000000..55fa8e9e0
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos990-x1s-common.dtsi
> @@ -0,0 +1,98 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
> +/*
> + * Samsung Galaxy S20 Series device tree source
> + *
> + * Copyright (c) 2024, Umer Uddin <umer.uddin@xxxxxxxxxxxxxxxxxxxxxxxxxx>
> + */
> +
> +/dts-v1/;
> +#include "exynos990.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +
> +/ {
> + chosen {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + framebuffer0: framebuffer@f1000000 {
> + compatible = "simple-framebuffer";
> + reg = <0 0xf1000000 0 (1440 * 3200 * 4)>;
> + width = <1440>;
> + height = <3200>;
> + stride = <(1440 * 4)>;
> + format = "a8r8g8b8";
> + };
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + cont_splash_mem: framebuffer@f1000000 {
> + reg = <0 0xf1000000 0 0x1194000>;
> + no-map;
> + };
> +
> + abox_reserved: audio@f7fb0000 {
> + reg = <0 0xf7fb0000 0 0x2a50000>;
> + no-map;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + pinctrl-0 = <&key_power &key_voldown &key_volup>;
> + pinctrl-names = "default";
> +
> + power-key {
> + label = "Power";
> + linux,code = <KEY_POWER>;
> + gpios = <&gpa2 4 GPIO_ACTIVE_LOW>;
> + wakeup-source;
> + };
> +
> + voldown-key {
> + label = "Volume Down";
> + linux,code = <KEY_VOLUMEDOWN>;
> + gpios = <&gpa0 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + volup-key {
> + label = "Volume Up";
> + linux,code = <KEY_VOLUMEUP>;
> + gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
> + };
> + };
> +};
> +
> +&oscclk {
> + clock-frequency = <26000000>;
> +};
> +
> +&pinctrl_alive {
> + key_power: key-power-pins {
> + samsung,pins = "gpa2-4";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
> + };
> +
> + key_voldown: key-voldown-pins {
> + samsung,pins = "gpa0-4";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
> + };
> +
> + key_volup: key-volup-pins {
> + samsung,pins = "gpa0-3";
> + samsung,pin-function = <EXYNOS_PIN_FUNC_EINT>;
> + samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
> + samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
> + };
> +};