[PATCH 4/4] phy: rockchip: samsung-hdptx: Add high color depth management

From: Cristian Ciocaltea
Date: Fri Dec 06 2024 - 17:04:38 EST


Add support for 8-bit, 10-bit, 12-bit and 16-bit color depth setup.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxxxxxx>
---
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
index eeadebdc476caa87aebbbd82f7102b62b22a0ea6..76c30c4ad6768679c3e36e3d0789e716afc0bc30 100644
--- a/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
+++ b/drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
@@ -274,6 +274,7 @@ struct rk_hdptx_phy {
int nr_clks;
struct reset_control_bulk_data rsts[RST_MAX];
unsigned long tmds_char_rate;
+ unsigned int bpc;

/* clk provider */
struct clk_hw hw;
@@ -814,6 +815,9 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx,
regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_POSTDIV_SEL_MASK,
FIELD_PREP(PLL_PCG_POSTDIV_SEL_MASK, cfg->pms_sdiv));

+ regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_SEL_MASK,
+ FIELD_PREP(PLL_PCG_CLK_SEL_MASK, (hdptx->bpc - 8) >> 1));
+
regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN,
PLL_PCG_CLK_EN);

@@ -916,7 +920,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy)
rate = phy_get_bus_width(hdptx->phy) & 0xfffffff;
}

- dev_dbg(hdptx->dev, "%s rate=%u\n", __func__, rate);
+ dev_dbg(hdptx->dev, "%s rate=%u bpc=%u\n", __func__, rate, hdptx->bpc);

ret = rk_hdptx_phy_consumer_get(hdptx, rate);
if (ret)
@@ -943,6 +947,18 @@ static int rk_hdptx_phy_configure(struct phy *phy,

hdptx->tmds_char_rate = opts->hdmi.tmds_char_rate;

+ switch (opts->hdmi.bpc) {
+ case 8:
+ case 10:
+ case 12:
+ case 16:
+ hdptx->bpc = opts->hdmi.bpc;
+ break;
+ default:
+ dev_warn(hdptx->dev, "Discarded unsupported bpc: %u\n",
+ opts->hdmi.bpc);
+ };
+
return 0;
}

@@ -1090,6 +1106,7 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev)
return -ENOMEM;

hdptx->dev = dev;
+ hdptx->bpc = 8;

regs = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(regs))

--
2.47.0