Re: [PATCH v2] perf vendor events arm64: Add FUJITSU-MONAKA pmu event

From: James Clark
Date: Mon Dec 09 2024 - 05:01:59 EST




On 11/11/2024 6:48 am, Yoshihiro Furudera wrote:
Add pmu events for FUJITSU-MONAKA.
And, also updated common-and-microarch.json and recommended.json.

FUJITSU-MONAKA Specification URL:
https://github.com/fujitsu/FUJITSU-MONAKA

Signed-off-by: Akio Kakuno <fj3333bs@xxxxxxxxxxxxxxxxx>
Signed-off-by: Yoshihiro Furudera <fj5100bi@xxxxxxxxxxx>
---
Changes in v2:
- Change "SVE_INT64_DIV_SPEC" to "SVE_INT_DIV64_SPEC" in tools/perf/pmu-events/arch/arm64/fujitsu/monaka/sve.json.
- Link to v1: https://lore.kernel.org/all/20241111024529.2985894-1-fj5100bi@xxxxxxxxxxx/

.../arch/arm64/common-and-microarch.json | 858 ++++++++++++++++++
.../fujitsu/monaka/cycle_accounting.json | 146 +++
.../arch/arm64/fujitsu/monaka/energy.json | 20 +
.../arch/arm64/fujitsu/monaka/exception.json | 32 +
.../arm64/fujitsu/monaka/fp_operation.json | 194 ++++
.../arch/arm64/fujitsu/monaka/gcycle.json | 116 +++
.../arch/arm64/fujitsu/monaka/general.json | 8 +
.../arch/arm64/fujitsu/monaka/hwpf.json | 62 ++
.../arch/arm64/fujitsu/monaka/l1d_cache.json | 101 +++
.../arch/arm64/fujitsu/monaka/l1i_cache.json | 47 +
.../arch/arm64/fujitsu/monaka/l2_cache.json | 146 +++
.../arch/arm64/fujitsu/monaka/l3_cache.json | 185 ++++
.../arch/arm64/fujitsu/monaka/ll_cache.json | 8 +
.../arch/arm64/fujitsu/monaka/memory.json | 8 +
.../arch/arm64/fujitsu/monaka/pipeline.json | 230 +++++
.../arch/arm64/fujitsu/monaka/retired.json | 29 +
.../arm64/fujitsu/monaka/spec_operation.json | 158 ++++
.../arch/arm64/fujitsu/monaka/stall.json | 83 ++
.../arch/arm64/fujitsu/monaka/sve.json | 146 +++
.../arch/arm64/fujitsu/monaka/tlb.json | 404 +++++++++
.../arch/arm64/fujitsu/monaka/trace.json | 20 +
tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 +
.../pmu-events/arch/arm64/recommended.json | 6 +
23 files changed, 3008 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/cycle_accounting.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/energy.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/exception.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/fp_operation.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/gcycle.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/general.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/hwpf.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/l1d_cache.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/l1i_cache.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/l2_cache.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/l3_cache.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/ll_cache.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/memory.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/pipeline.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/retired.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/spec_operation.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/stall.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/sve.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/tlb.json
create mode 100644 tools/perf/pmu-events/arch/arm64/fujitsu/monaka/trace.json

diff --git a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
index 492083b99256..50fc4b2df361 100644
--- a/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
+++ b/tools/perf/pmu-events/arch/arm64/common-and-microarch.json
@@ -533,6 +533,12 @@
"EventName": "SVE_INST_SPEC",
"BriefDescription": "SVE operations speculatively executed"
},
+ {
+ "PublicDescription": "This event counts architecturally executed Advanced SIMD and SVE operations.",
+ "EventCode": "0x8007",
+ "EventName": "ASE_SVE_INST_SPEC",
+ "BriefDescription": "This event counts architecturally executed Advanced SIMD and SVE operations."
+ },

Hi Yoshihiro,

You don't need to duplicate the descriptions if they are the same. Just BriefDescription is enough and it will show for both normal and verbose mode.

Also in the common files, we're using the description strings from the Arm ARM. I noticed that the ones from your spec are slightly different. This is ok for now, but if we add any new Arm cores that use the same events this description may get overwritten. For example ASE_SVE_INST_SPEC in the Arm ARM is currently "Operation speculatively executed, Advanced SIMD or SVE".

If you have any actual relevant details that are different from the common string, you should put them in .../arch/arm64/fujitsu/monaka. But if you are ok with the potential overwrite (which looks like it should be ok) then you can leave them as is.

[...]

diff --git a/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/general.json b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/general.json
new file mode 100644
index 000000000000..80bf17fb8f4c
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/general.json
@@ -0,0 +1,8 @@
+[
+ {
+ "ArchStdEvent": "CPU_CYCLES"
+ },

Other cores put CPU_CYCLES in bus.json. For user friendlyness I would put the common ones into the same existing groups. The same issue applies for some other common events.


Thanks
James