[patch 0/5] genirq, x86: Rework deferred interrupt affinity logic

[Thomas Gleixner]

In a recent discussion about the potential race condition with unmaskable
MSI interrupts on RISC-V:

  https;//lore.kernel.org/all/87r06gq2di.ffs@tglx

it turned out that RISC-V needs the GENERIC_PENDING_IRQ infrastructure to
close the gap.

It turns out that the logic behind GENERIC_PENDING_IRQ is slighly
convoluted and backwards for the general case:

   1) The default is to defer, which is not what the majority of interrupt
      controllers need.

   2) Deferrement is handled as per interrupt flag. That's a pointless
      exercise as the requirement is actually per interrupt controller.

To ease the conversion of RISC-V, rework the logic to make the deferrement
based on an interrupt chip flag and convert x86 over, which then allows to
remove the current double book keeping of the non-deferrement flag.

The conversion is done in two steps with an intermediate config switch as
RISC-V needs a trivial way to backport the changes.

Thanks,

	tglx
---
 arch/arc/Kconfig                    |    1 -
 arch/arc/kernel/mcip.c              |    2 --
 arch/hexagon/Kconfig                |    1 -
 arch/x86/hyperv/irqdomain.c         |    2 +-
 arch/x86/kernel/apic/io_apic.c      |    2 +-
 arch/x86/kernel/apic/msi.c          |    3 ++-
 arch/x86/kernel/hpet.c              |    8 --------
 arch/x86/platform/uv/uv_irq.c       |    2 --
 drivers/iommu/amd/init.c            |    2 +-
 drivers/iommu/amd/iommu.c           |    1 -
 drivers/iommu/intel/irq_remapping.c |    1 -
 drivers/pci/controller/pci-hyperv.c |    1 +
 drivers/xen/events/events_base.c    |    6 ------
 include/linux/irq.h                 |   14 +++-----------
 kernel/irq/Kconfig                  |    4 ++++
 kernel/irq/chip.c                   |    4 +---
 kernel/irq/debugfs.c                |    2 +-
 kernel/irq/internals.h              |    2 +-
 kernel/irq/settings.h               |    6 ------
 19 files changed, 16 insertions(+), 48 deletions(-)