Re: [PATCH v4 15/16] drm/msm/dp: read hw revision only once

[Abhinav Kumar]

On 12/15/2024 2:44 PM, Dmitry Baryshkov wrote:
> There is little point in rereading DP controller revision over and over
> again. Read it once, after the first software reset and propagate it to
> the dp_panel module.

Good idea, can be posted even separately in front of the catalog rework 
as it fits in nicely even with current model.

> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
> ---
>   drivers/gpu/drm/msm/dp/dp_catalog.c | 13 -------------
>   drivers/gpu/drm/msm/dp/dp_catalog.h |  3 ---
>   drivers/gpu/drm/msm/dp/dp_ctrl.c    | 12 +++++++++---
>   drivers/gpu/drm/msm/dp/dp_panel.c   |  3 +--
>   drivers/gpu/drm/msm/dp/dp_panel.h   |  1 +
>   5 files changed, 11 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c
> index 2992a0df262e9ab167a21a270d1aa8fd1383033d..84adf3a38e4cf0619b15850c31416f1e67049a42 100644
> --- a/drivers/gpu/drm/msm/dp/dp_catalog.c
> +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c
> @@ -42,19 +42,6 @@ void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct msm_d
>   				    msm_dp_catalog->p0_len, msm_dp_catalog->p0_base, "dp_p0");
>   }
>   
> -/**
> - * msm_dp_catalog_hw_revision() - retrieve DP hw revision
> - *
> - * @msm_dp_catalog: DP catalog structure
> - *
> - * Return: DP controller hw revision
> - *
> - */
> -u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog)
> -{
> -	return msm_dp_read_ahb(msm_dp_catalog, REG_DP_HW_VERSION);
> -}
> -
>   static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len)
>   {
>   	struct resource *res;
> diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h
> index 310319619242df5fa0d91c89fbcc477f16c130ea..ddbae0fcf5fc428b2d37cd1eab1d5860a2f11a50 100644
> --- a/drivers/gpu/drm/msm/dp/dp_catalog.h
> +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h
> @@ -95,9 +95,6 @@ static inline void msm_dp_write_link(struct msm_dp_catalog *msm_dp_catalog,
>   /* Debug module */
>   void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct msm_disp_state *disp_state);
>   
> -/* DP Controller APIs */
> -u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog);
> -
>   struct msm_dp_catalog *msm_dp_catalog_get(struct device *dev);
>   
>   #endif /* _DP_CATALOG_H_ */
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index b15b7ba599e29c4edd746e9c2a8bf2f4a8eedf15..60dbf7eab3fd184bc12035d267abb3758cce9f89 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -131,6 +131,8 @@ struct msm_dp_ctrl_private {
>   	struct completion psr_op_comp;
>   	struct completion video_comp;
>   
> +	u32 hw_revision;
> +
>   	bool core_clks_on;
>   	bool link_clks_on;
>   	bool stream_clks_on;
> @@ -173,6 +175,11 @@ void msm_dp_ctrl_reset(struct msm_dp_ctrl *msm_dp_ctrl)
>   
>   	sw_reset &= ~DP_SW_RESET;
>   	msm_dp_write_ahb(msm_dp_catalog, REG_DP_SW_RESET, sw_reset);
> +
> +	if (!ctrl->hw_revision) {
> +		ctrl->hw_revision = msm_dp_read_ahb(msm_dp_catalog, REG_DP_HW_VERSION);
> +		ctrl->panel->hw_revision = ctrl->hw_revision;
> +	}
>   }
>   
>   static u32 msm_dp_ctrl_get_aux_interrupt(struct msm_dp_ctrl_private *ctrl)
> @@ -307,12 +314,11 @@ static void msm_dp_ctrl_mainlink_disable(struct msm_dp_ctrl_private *ctrl)
>   static void msm_dp_setup_peripheral_flush(struct msm_dp_ctrl_private *ctrl)
>   {
>   	struct msm_dp_catalog *msm_dp_catalog = ctrl->catalog;
> -	u32 mainlink_ctrl, hw_revision;
> +	u32 mainlink_ctrl;
>   
>   	mainlink_ctrl = msm_dp_read_link(msm_dp_catalog, REG_DP_MAINLINK_CTRL);
>   
> -	hw_revision = msm_dp_catalog_hw_revision(msm_dp_catalog);
> -	if (hw_revision >= DP_HW_VERSION_1_2)
> +	if (ctrl->hw_revision >= DP_HW_VERSION_1_2)
>   		mainlink_ctrl |= DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE;
>   	else
>   		mainlink_ctrl |= DP_MAINLINK_FLUSH_MODE_UPDATE_SDP;
> diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c
> index 3441c28e3ce332bfe932d7adee7f0ecbaa486c2e..969d618c909876fd7a13aeb6e6c9e117071bc682 100644
> --- a/drivers/gpu/drm/msm/dp/dp_panel.c
> +++ b/drivers/gpu/drm/msm/dp/dp_panel.c
> @@ -380,9 +380,8 @@ static void msm_dp_panel_send_vsc_sdp(struct msm_dp_panel_private *panel, struct
>   
>   static void msm_dp_panel_update_sdp(struct msm_dp_panel_private *panel)
>   {
> -	u32 hw_revision;
> +	u32 hw_revision = panel->msm_dp_panel.hw_revision;
>   
> -	hw_revision = msm_dp_catalog_hw_revision(panel->catalog);
>   	if (hw_revision >= DP_HW_VERSION_1_0 &&
>   	    hw_revision < DP_HW_VERSION_1_2) {
>   		msm_dp_write_link(panel->catalog, MMSS_DP_SDP_CFG3, UPDATE_SDP);
> diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_panel.h
> index 8dde55b3a5ab64c0c12d69cb2dd5b5c733c83432..c348417bb07f33efdf1402a73c27ff99e394e5a3 100644
> --- a/drivers/gpu/drm/msm/dp/dp_panel.h
> +++ b/drivers/gpu/drm/msm/dp/dp_panel.h
> @@ -38,6 +38,7 @@ struct msm_dp_panel {
>   	struct msm_dp_panel_psr psr_cap;
>   	bool video_test;
>   	bool vsc_sdp_supported;
> +	u32 hw_revision;
>   
>   	u32 max_dp_lanes;
>   	u32 max_dp_link_rate;