[PATCH v23 2/4] dt-bindings: pwm: rzg2l-gpt: Document renesas,poegs property

From: Biju Das
Date: Tue Dec 17 2024 - 08:30:01 EST


RZ/G2L GPT IP supports output pin disable function by dead time
error and detecting short-circuits between output pins.

Add documentation for the optional property renesas,poegs to
link a pair of GPT IOs with POEG.

Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v22->v23:
* No change.
v21->v22:
* No change.
v20->v21:
* No change.
v19->v20:
* No change.
v18->v19:
* No change.
v17->v18:
* No change.
v16->v17:
* No change.
v15->v16:
* No change.
v14->v15:
* No change.
v3->v14:
* Add Rb tag from Rob.
* Moved the patch from series[1] to here.
[1] https://lore.kernel.org/linux-renesas-soc/20221215205843.4074504-1-biju.das.jz@xxxxxxxxxxxxxx/T/#t
v2->v3:
* Moved minItems/MaxItems one level up.
v1->v2:
* removed quotes from ref
* Added maxItems and minItems for renesas,poegs property
* Added enums for gpt index
---
.../bindings/pwm/renesas,rzg2l-gpt.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml
index 13b807765a30..98bcde755fb9 100644
--- a/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml
+++ b/Documentation/devicetree/bindings/pwm/renesas,rzg2l-gpt.yaml
@@ -245,6 +245,28 @@ properties:
resets:
maxItems: 1

+ renesas,poegs:
+ minItems: 1
+ maxItems: 8
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ items:
+ items:
+ - description: phandle to POEG instance that serves the output disable
+ - enum: [ 0, 1, 2, 3, 4, 5, 6, 7 ]
+ description: |
+ An index identifying pair of GPT channels.
+ <0> : GPT channels 0 and 1
+ <1> : GPT channels 2 and 3
+ <2> : GPT channels 4 and 5
+ <3> : GPT channels 6 and 7
+ <4> : GPT channels 8 and 9
+ <5> : GPT channels 10 and 11
+ <6> : GPT channels 12 and 13
+ <7> : GPT channels 14 and 15
+ description:
+ A list of phandle and channel index pair tuples to the POEGs that handle the
+ output disable for the GPT channels.
+
required:
- compatible
- reg
@@ -375,4 +397,5 @@ examples:
power-domains = <&cpg>;
resets = <&cpg R9A07G044_GPT_RST_C>;
#pwm-cells = <3>;
+ renesas,poegs = <&poeggd 4>;
};
--
2.43.0