Re: [PATCH 3/4] clk: renesas: r8a779g0: Add VSPX clocks

[Laurent Pinchart]

Hi Jacopo,

Thank you for the patch.

On Tue, Dec 17, 2024 at 06:53:16PM +0100, Jacopo Mondi wrote:
> Add the VSPX modules clock for Renesas R-Car V4H (R8A779G0) SoC.
> 
> Signed-off-by: Jacopo Mondi <jacopo.mondi@xxxxxxxxxxxxxxxx>
> ---
>  drivers/clk/renesas/r8a779g0-cpg-mssr.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
> index dc9ac2839ad9bb6c222db015de72fe8d9e7fe208..4e88096f8c4583d60debc3989fb22a51b41762a6 100644
> --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c
> +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c
> @@ -238,6 +238,8 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = {
>  	DEF_MOD("pfc2",		917,	R8A779G0_CLK_CP),
>  	DEF_MOD("pfc3",		918,	R8A779G0_CLK_CP),
>  	DEF_MOD("tsc",		919,	R8A779G0_CLK_CL16M),
> +	DEF_MOD("vspx0",	1028,	R8A779G0_CLK_S0D4_VIO),
> +	DEF_MOD("vspx1",	1029,	R8A779G0_CLK_S0D4_VIO),

Same comment about the parent as in 1/4.

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>

>  	DEF_MOD("fcpvx0",	1100,	R8A779G0_CLK_S0D4_VIO),
>  	DEF_MOD("fcpvx1",	1101,	R8A779G0_CLK_S0D4_VIO),
>  	DEF_MOD("tsn",		2723,	R8A779G0_CLK_S0D4_HSC),

-- 
Regards,

Laurent Pinchart