Re: [PATCH v2 0/2] KVM: nVMX: Fix an SVI update bug with passthrough APIC

[Sean Christopherson]

On Wed, 27 Nov 2024 16:00:08 -0800, Sean Christopherson wrote:
> Defer updating SVI (i.e. the VMCS's highest ISR cache) when L2 is active,
> but L1 has not enabled virtual interrupt delivery for L2, as an EOI that
> is emulated _by KVM_ in such a case acts on L1's ISR, i.e. vmcs01 needs to
> reflect the updated ISR when L1 is next run.
> 
> Note, L1's ISR is also effectively L2's ISR in such a setup, but because
> virtual interrupt deliver is disable for L2, there's no need to update
> SVI in vmcs02, because it will never be used.
> 
> [...]

Applied to kvm-x86 vmx, thanks!

[1/2] KVM: x86: Plumb in the vCPU to kvm_x86_ops.hwapic_isr_update()
      https://github.com/kvm-x86/linux/commit/76bce9f10162
[2/2] KVM: nVMX: Defer SVI update to vmcs01 on EOI when L2 is active w/o VID
      https://github.com/kvm-x86/linux/commit/b682d2fbf17c

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https://github.com/kvm-x86/linux/tree/next