[PATCH v3 6/6] arm64: dts: qcom: ipq5424: configure spi4 node for rdp466

From: Manikanta Mylavarapu
Date: Fri Dec 27 2024 - 02:26:40 EST


Enable the SPI4 node and configure the associated gpio pins.

Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx>
---
Changes in V3:
- Replace spi0 with spi4 in all applicable places such as
tlmm pin names, commit message, heading and dt node name.

arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts | 43 +++++++++++++++++++++
1 file changed, 43 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
index d4d31026a026..1e7c7f73b21e 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
+++ b/arch/arm64/boot/dts/qcom/ipq5424-rdp466.dts
@@ -23,6 +23,36 @@ &sleep_clk {
};

&tlmm {
+ spi4_default_state: spi4-default-state {
+ clk-pins {
+ pins = "gpio6";
+ function = "spi4_clk";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ cs-pins {
+ pins = "gpio7";
+ function = "spi4_cs";
+ drive-strength = <8>;
+ bias-pull-up;
+ };
+
+ miso-pins {
+ pins = "gpio8";
+ function = "spi4_miso";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+
+ mosi-pins {
+ pins = "gpio9";
+ function = "spi4_mosi";
+ drive-strength = <8>;
+ bias-pull-down;
+ };
+ };
+
sdc_default_state: sdc-default-state {
clk-pins {
pins = "gpio5";
@@ -57,3 +87,16 @@ &xo_board {
clock-frequency = <24000000>;
};

+&spi4 {
+ pinctrl-0 = <&spi4_default_state>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ flash@0 {
+ compatible = "micron,n25q128a11", "jedec,spi-nor";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-max-frequency = <50000000>;
+ };
+};
--
2.34.1