Re: [PATCH] arm64: dts: qcom: qcs8300: Add support for clock controllers

[Konrad Dybcio]

On 6.12.2024 7:39 AM, Imran Shaik wrote:
> 
> 
> On 11/30/2024 8:07 PM, Konrad Dybcio wrote:
>> On 14.11.2024 12:05 PM, Imran Shaik wrote:
>>> Add support for GPU, Video, Camera and Display clock controllers on
>>> Qualcomm QCS8300 platform.
>>>
>>> Signed-off-by: Imran Shaik <quic_imrashai@xxxxxxxxxxx>
>>> ---
>>> Please note that this series is dependent on [1] and [2], which adds support
>>> for QCS8300 initial device tree and QCS8300 multi media clock controllers respectively.
>>>
>>> [1] https://lore.kernel.org/all/20240925-qcs8300_initial_dtsi-v2-0-494c40fa2a42@xxxxxxxxxxx/
>>> [2] https://lore.kernel.org/all/20241106-qcs8300-mm-patches-v3-0-f611a8f87f15@xxxxxxxxxxx/ 
>>> ---
>>>  arch/arm64/boot/dts/qcom/qcs8300.dtsi | 59 +++++++++++++++++++++++++++++++++++
>>>  1 file changed, 59 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/qcs8300.dtsi b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>>> index 2c35f96c3f28..e43fada4acb5 100644
>>> --- a/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/qcs8300.dtsi
>>> @@ -5,6 +5,10 @@
>>>  
>>>  #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
>>>  #include <dt-bindings/clock/qcom,rpmh.h>
>>> +#include <dt-bindings/clock/qcom,sa8775p-camcc.h>
>>> +#include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
>>> +#include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>>> +#include <dt-bindings/clock/qcom,sa8775p-videocc.h>
>>>  #include <dt-bindings/interconnect/qcom,icc.h>
>>>  #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
>>>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>>> @@ -772,6 +776,20 @@ lpass_ag_noc: interconnect@3c40000 {
>>>  			qcom,bcm-voters = <&apps_bcm_voter>;
>>>  		};
>>>  
>>> +		gpucc: clock-controller@3d90000 {
>>> +			compatible = "qcom,qcs8300-gpucc";
>>> +			reg = <0x0 0x03d90000 0x0 0xa000>;
>>> +			clocks = <&rpmhcc RPMH_CXO_CLK>,
>>
>> Missing AHB clock
>>
> 
> We are re-using the qcom,gpucc.yaml bindings for the QCS8300, which doesn't have 
> the AHB clock. Hence, followed the same approach as all other latest targets.
> 
>>> +				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
>>> +				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
>>> +			clock-names = "bi_tcxo",
>>> +				      "gcc_gpu_gpll0_clk_src",
>>> +				      "gcc_gpu_gpll0_div_clk_src";
>>> +			#clock-cells = <1>;
>>> +			#reset-cells = <1>;
>>> +			#power-domain-cells = <1>;
>>> +		};
>>> +
>>>  		pmu@9091000 {
>>>  			compatible = "qcom,qcs8300-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
>>>  			reg = <0x0 0x9091000 0x0 0x1000>;
>>> @@ -882,6 +900,47 @@ gem_noc: interconnect@9100000 {
>>>  			qcom,bcm-voters = <&apps_bcm_voter>;
>>>  		};
>>>  
>>> +		videocc: clock-controller@abf0000 {
>>> +			compatible = "qcom,qcs8300-videocc";
>>> +			reg = <0x0 0x0abf0000 0x0 0x10000>;
>>> +			clocks = <&gcc GCC_VIDEO_AHB_CLK>,
>>
>> And the ones you reference here and below are not registered with
>> the clock framework.. 
>>
> 
> Yes, but these clocks are kept always-on from GCC driver probe.

Ah, ok then

Konrad