[PATCH] LoongArch: KVM: Clear LLBCTL if secondary mmu mapping is changed

[Bibo Mao]

Register LLBCTL is separated CSR register from host, host exception
eret instruction will clear host LLBCTL CSR register, guest
exception will clear guest LLBCTL CSR register.

VCPU0 atomic64_fetch_add_unless     VCPU1 atomic64_fetch_add_unless
     ll.d    %[p],  %[c]
     beq     %[p],  %[u], 1f
Here secondary mmu mapping is changed, host hpa page is replaced
with new page. And VCPU1 executed atomic instruction on new
page.
                                       ll.d    %[p],  %[c]
                                       beq     %[p],  %[u], 1f
                                       add.d   %[rc], %[p], %[a]
                                       sc.d    %[rc], %[c]
     add.d   %[rc], %[p], %[a]
     sc.d    %[rc], %[c]
LLBCTL is set on VCPU0 and it represents the memory is not modified
bt other VCPUs, sc.d will modify the memory directly.

Here clear guest LLBCTL_WCLLB register when mapping is the changed.

Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
---
 arch/loongarch/kvm/main.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/loongarch/kvm/main.c b/arch/loongarch/kvm/main.c
index 396fed2665a5..7566fa85f8e7 100644
--- a/arch/loongarch/kvm/main.c
+++ b/arch/loongarch/kvm/main.c
@@ -245,6 +245,24 @@ void kvm_check_vpid(struct kvm_vcpu *vcpu)
 		trace_kvm_vpid_change(vcpu, vcpu->arch.vpid);
 		vcpu->cpu = cpu;
 		kvm_clear_request(KVM_REQ_TLB_FLUSH_GPA, vcpu);
+
+		/*
+		 * LLBCTL is separated CSR register from host, general exception
+		 * eret instruction in host mode clears host LLBCTL register,
+		 * and clears guest register in guest mode. eret in refill
+		 * exception does not clear LLBCTL register.
+		 *
+		 * When second mmu mapping is changed, guest OS does not know
+		 * even if the content is changed after mapping is changed
+		 *
+		 * Here clear guest LLBCTL register when mapping is changed,
+		 * else if mapping is changed when guest is executing
+		 * LL/SC pair, LL loads with old address and set LLBCTL flag,
+		 * SC checks LLBCTL flag and store new address successfully
+		 * since LLBCTL_WCLLB is on, even if memory with new address is
+		 * changed on other VCPUs.
+		 */
+		set_gcsr_llbctl(CSR_LLBCTL_WCLLB);
 	}
 
 	/* Restore GSTAT(0x50).vpid */

base-commit: fc033cf25e612e840e545f8d5ad2edd6ba613ed5
-- 
2.39.3