Re: [PATCH 03/12] x86/mm: add X86_FEATURE_INVLPGB definition.
From: Borislav Petkov
Date: Thu Jan 02 2025 - 07:05:29 EST
On Mon, Dec 30, 2024 at 12:53:04PM -0500, Rik van Riel wrote:
> Add the INVPLGB CPUID definition, allowing the kernel to recognize
> whether the CPU supports the INVLPGB instruction.
>
> Signed-off-by: Rik van Riel <riel@xxxxxxxxxxx>
> ---
> arch/x86/include/asm/cpufeatures.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 17b6590748c0..b7209d6c3a5f 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -338,6 +338,7 @@
> #define X86_FEATURE_CLZERO (13*32+ 0) /* "clzero" CLZERO instruction */
> #define X86_FEATURE_IRPERF (13*32+ 1) /* "irperf" Instructions Retired Count */
> #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* "xsaveerptr" Always save/restore FP error pointers */
> +#define X86_FEATURE_INVLPGB (13*32+ 3) /* "invlpgb" INVLPGB instruction */
^^^^^^^^^
We don't show random CPUID bits in /proc/cpuinfo anymore so you can remove
that.
> #define X86_FEATURE_RDPRU (13*32+ 4) /* "rdpru" Read processor register at user level */
> #define X86_FEATURE_WBNOINVD (13*32+ 9) /* "wbnoinvd" WBNOINVD instruction */
> #define X86_FEATURE_AMD_IBPB (13*32+12) /* Indirect Branch Prediction Barrier */
> --
Also, merge this patch with the patch which uses the flag pls.
Thx.
--
Regards/Gruss,
Boris.
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