Re: [PATCH 05/12] x86/mm: add INVLPGB support code

[Borislav Petkov]

On Mon, Dec 30, 2024 at 12:53:06PM -0500, Rik van Riel wrote:
> +static inline void __invlpgb(unsigned long asid, unsigned long pcid, unsigned long addr,
> +			    int extra_count, bool pmd_stride, unsigned long flags)

That pmd_stride thing - the callers should supply a bool: true/false instead
of 0/1 for more clarity at the call sites.

> +{
> +	u64 rax = addr | flags;
> +	u32 ecx = (pmd_stride << 31) | extra_count;

You need to handle the case where extra_count becomes negative because callers
supply nr=0 and you do "nr - 1" below and then you'll end up flushing
0b1111_1111_1111_1111 TLB entries.

"ECX[15:0] contains a count of the number of sequential pages to invalidate in
addition to the original virtual address, starting from the virtual address
specified in rAX."

> +	u32 edx = (pcid << 16) | asid;
> +
> +	asm volatile("invlpgb" : : "a" (rax), "c" (ecx), "d" (edx));
> +}

-- 
Regards/Gruss,
    Boris.

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