Re: [PATCH v3 5/6] clk: renesas: r9a09g057: Add reset entry for SYS

[Geert Uytterhoeven]

On Thu, Jan 2, 2025 at 7:18 PM Prabhakar <prabhakar.csengg@xxxxxxxxx> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
>
> Add the missing reset entry for the `SYS` module in the clock driver. The
> corresponding core clock entry for `SYS` is already present.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> ---
> v2->v3
> - Included RB tag from Geert

Thanks, will queue in renesas-clk for v6.14.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds