Re: [PATCH v3 0/2] cpufreq/amd-pstate: Set initial min_freq to lowest_nonlinear_freq

[Russell Haley]

On 12/8/24 10:35 AM, Mario Limonciello wrote:
> On 12/8/2024 01:54, Hanabishi wrote:
>> Hello. Maybe I'm too late on this, but I have some concerns.
>>
>> On 10/17/24 05:39, Dhananjay Ugwekar wrote:
>>> In other systems, power consumption has increased but so has the
>>> throughput/watt.
>>
>> I just want to bring up the fact that this change affects all
>> governors. It sounds good for the performance governor, but not so
>> much for the powersave governor.
>>
>> So the question is: don't we want the lowest power consumption
>> possible in the powersave mode? Even if it means decreased efficiency.
>> Powersave by definition supposed to make battery last as long as
>> possible no matter what, isn't it?
>>
> 
> No, the powersave governor isn't a one stop shop to bring everything to
> longest battery.
> 
> By your argument we should set the EPP to "power" by default and "boost"
> to off by default when the powersave governor is enacted?
> 
> All of those are far too aggressive for a default behavior.  Setting the
> lowest nonlinear frequency as the default lowest scaling frequency is
> about having a good default that balances responsiveness, battery life
> and performance.
> 
> Like all knobs anyone that doesn't agree with it can of course modify it
> from sysfs.
> 

If the documentation is correct, the lowest_nonlinear_frequency *does*
result in the lowest battery consumption unless you are running one or
more threads at 100% utilization until the battery dies. In that case,
lowest nonlinear frequency should result in greatest number of
instructions retired when the battery dies. I say instructions retired
rather than work completed, because "100% until the battery dies" is
only stress tests, malware, and damn-the-torpedos concurrency frameworks
that use spinwaits.

If that is not true, then either the documentation is wrong, or the
CPU's reporting of its lowest nonlinear frequency is wrong.

I am puzzled why the CPU even exposes frequencies below
lowest-nonlinear. They should always be worse than PWM-ing between C0 at
lowest nonlinear freq and some deeper C-state. Testing software that has
to run on much slower CPUs, I guess?