Re: [PATCH] clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI

[Lad, Prabhakar]

Hi,

Thank you for the report.

On Mon, Jan 6, 2025 at 3:11 AM kernel test robot <lkp@xxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> kernel test robot noticed the following build warnings:
>
> [auto build test WARNING on geert-renesas-drivers/renesas-clk]
> [also build test WARNING on clk/clk-next linus/master v6.13-rc6 next-20241220]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url:    https://github.com/intel-lab-lkp/linux/commits/Prabhakar/clk-renesas-r9a07g044-Add-clock-and-reset-entry-for-DRP-AI/20250105-015708
> base:   https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git renesas-clk
> patch link:    https://lore.kernel.org/r/20250104175346.656352-1-prabhakar.mahadev-lad.rj%40bp.renesas.com
> patch subject: [PATCH] clk: renesas: r9a07g044: Add clock and reset entry for DRP-AI
> config: nios2-randconfig-r052-20250106 (https://download.01.org/0day-ci/archive/20250106/202501061001.6iClUTxN-lkp@xxxxxxxxx/config)
> compiler: nios2-linux-gcc (GCC) 14.2.0
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250106/202501061001.6iClUTxN-lkp@xxxxxxxxx/reproduce)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp@xxxxxxxxx>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202501061001.6iClUTxN-lkp@xxxxxxxxx/
>
> All warnings (new ones prefixed by >>):
>
> >> drivers/clk/renesas/r9a07g044-cpg.c:97:35: warning: 'dtable_4_32' defined but not used [-Wunused-const-variable=]
>       97 | static const struct clk_div_table dtable_4_32[] = {
>          |                                   ^~~~~~~~~~~
>
>
> vim +/dtable_4_32 +97 drivers/clk/renesas/r9a07g044-cpg.c
>
>     96
>   > 97  static const struct clk_div_table dtable_4_32[] = {
>     98          {3, 4},
>     99          {4, 5},
>    100          {5, 6},
>    101          {6, 7},
>    102          {7, 8},
>    103          {8, 9},
>    104          {9, 10},
>    105          {10, 11},
>    106          {11, 12},
>    107          {12, 13},
>    108          {13, 14},
>    109          {14, 15},
>    110          {15, 16},
>    111          {16, 17},
>    112          {17, 18},
>    113          {18, 19},
>    114          {19, 20},
>    115          {20, 21},
>    116          {21, 22},
>    117          {22, 23},
>    118          {23, 24},
>    119          {24, 25},
>    120          {25, 26},
>    121          {26, 27},
>    122          {27, 28},
>    123          {28, 29},
>    124          {29, 30},
>    125          {30, 31},
>    126          {31, 32},
>    127          {0, 0},
>    128  };
>    129
>
I'll guard the above with #ifdef CONFIG_CLK_R9A07G054.

Cheers,
Prabhakar