Re: [PATCH] dt-bindings: soc: Add new board description for Versal NET

[Michal Simek]

On 1/8/25 12:47, Krzysztof Kozlowski wrote:
> On 08/01/2025 12:33, Shubhrajyoti Datta wrote:
> >   description: |
> > -  Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
> > +  Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC or Versal Adaptive SoCs
> >   
> >   properties:
> >     $nodename:
> > @@ -187,6 +187,10 @@ properties:
> >             - const: qemu,mbv
> >             - const: amd,mbv
> >   
> > +      - description: Xilinx Versal NET
> > +        items:
> > +          - const: xlnx,versal-net
>
> It is usually too difficult to use SoCs on their own. Just too small
> pins for our clumsy fingers. Therefore I don't get how this is supposed
> to be used...
>
> Anyway, provide the user for the binding (DTS).

ok. Let us strip our current DT from descriptions which are not upstreamed yet 
and wire one board to be also listed.

Thanks,
Michal