Re: [PATCH v1 25/29] cxl/amd: Enable Zen5 address translation using ACPI PRMT

[Robert Richter]

On 08.01.25 10:48:23, Gregory Price wrote:

> > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> > index 901555bf4b73..c8176265c15c 100644
> > --- a/drivers/cxl/core/port.c
> > +++ b/drivers/cxl/core/port.c
> > @@ -831,6 +831,11 @@ static void cxl_debugfs_create_dport_dir(struct cxl_dport *dport)
> >  			    &cxl_einj_inject_fops);
> >  }
> >  
> > +static void cxl_port_platform_setup(struct cxl_port *port)
> > +{
> > +	cxl_port_setup_amd(port);
> > +}
> > +
> 
> Assuming this gets expanded (which it may not), should we expect this
> function to end up like so?
> 
> static void cxl_port_platform_setup(struct cxl_port *port)
> {
> 	cxl_port_setup_amd(port);
> 	cxl_port_setup_intel(port);
> 	cxl_port_setup_arm(port);
> 	... etc ...
> }
> 
> I suppose this logic has to exist somewhere in some form, just want to make
> sure this is what we want.  Either way, this is easily modifiable, so
> not a blocker as I said.

Yes, it is exactly designed like that. I will update the patch
description.

-Robert