Re: [PATCH 04/12] x86/mm: get INVLPGB count max from CPUID

[Tom Lendacky]

On 12/30/24 11:53, Rik van Riel wrote:
> The CPU advertises the maximum number of pages that can be shot down
> with one INVLPGB instruction in the CPUID data.
> 
> Save that information for later use.
> 
> Signed-off-by: Rik van Riel <riel@xxxxxxxxxxx>
> ---
>  arch/x86/include/asm/tlbflush.h | 1 +
>  arch/x86/kernel/cpu/amd.c       | 8 ++++++++
>  arch/x86/kernel/setup.c         | 4 ++++
>  3 files changed, 13 insertions(+)
> 
> diff --git a/arch/x86/include/asm/tlbflush.h b/arch/x86/include/asm/tlbflush.h
> index 02fc2aa06e9e..7d1468a3967b 100644
> --- a/arch/x86/include/asm/tlbflush.h
> +++ b/arch/x86/include/asm/tlbflush.h
> @@ -182,6 +182,7 @@ static inline void cr4_init_shadow(void)
>  
>  extern unsigned long mmu_cr4_features;
>  extern u32 *trampoline_cr4_features;
> +extern u16 invlpgb_count_max;
>  
>  extern void initialize_tlbstate_and_flush(void);
>  
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index 79d2e17f6582..226b8fc64bfc 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -1135,6 +1135,14 @@ static void cpu_detect_tlb_amd(struct cpuinfo_x86 *c)
>  		tlb_lli_2m[ENTRIES] = eax & mask;
>  
>  	tlb_lli_4m[ENTRIES] = tlb_lli_2m[ENTRIES] >> 1;
> +
> +	if (c->extended_cpuid_level < 0x80000008)
> +		return;

Can this just be based on cpu_feature_enabled(X86_FEATURE_TLBI), e.g:

	if (cpu_feature_enabled(X86_FEATURE_TLBI))
		invlpgb_count_max = (cpuid_edx(0x80000008) & 0xffff) + 1

Then you can squash this and the previous patch.

Thanks,
Tom

> +
> +	cpuid(0x80000008, &eax, &ebx, &ecx, &edx);
> +
> +	/* Max number of pages INVLPGB can invalidate in one shot */
> +	invlpgb_count_max = (edx & 0xffff) + 1;
>  }
>  
>  static const struct cpu_dev amd_cpu_dev = {
> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index f1fea506e20f..6c4d08f8f7b1 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -138,6 +138,10 @@ __visible unsigned long mmu_cr4_features __ro_after_init;
>  __visible unsigned long mmu_cr4_features __ro_after_init = X86_CR4_PAE;
>  #endif
>  
> +#ifdef CONFIG_CPU_SUP_AMD
> +u16 invlpgb_count_max __ro_after_init;
> +#endif
> +
>  #ifdef CONFIG_IMA
>  static phys_addr_t ima_kexec_buffer_phys;
>  static size_t ima_kexec_buffer_size;