[PATCH net 1/2] net: stmmac: Limit FIFO size by hardware feature value

From: Kunihiko Hayashi
Date: Wed Jan 15 2025 - 21:10:20 EST


Tx/Rx FIFO size is specified by the parameter "{tx,rx}-fifo-depth" from
the platform layer.

However, these values are constrained by upper limits determined by the
capabilities of each hardware feature. There is a risk that the upper
bits will be truncated due to the calculation, so it's appropriate to
limit them to the upper limit values.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 7bf275f127c9..2d69c3c4b329 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2375,9 +2375,9 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
u32 chan = 0;
u8 qmode = 0;

- if (rxfifosz == 0)
+ if (!rxfifosz || rxfifosz > priv->dma_cap.rx_fifo_size)
rxfifosz = priv->dma_cap.rx_fifo_size;
- if (txfifosz == 0)
+ if (!txfifosz || txfifosz > priv->dma_cap.tx_fifo_size)
txfifosz = priv->dma_cap.tx_fifo_size;

/* Split up the shared Tx/Rx FIFO memory on DW QoS Eth and DW XGMAC */
@@ -2851,9 +2851,9 @@ static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,
int rxfifosz = priv->plat->rx_fifo_size;
int txfifosz = priv->plat->tx_fifo_size;

- if (rxfifosz == 0)
+ if (!rxfifosz || rxfifosz > priv->dma_cap.rx_fifo_size)
rxfifosz = priv->dma_cap.rx_fifo_size;
- if (txfifosz == 0)
+ if (!txfifosz || txfifosz > priv->dma_cap.tx_fifo_size)
txfifosz = priv->dma_cap.tx_fifo_size;

/* Adjust for real per queue fifo size */
--
2.25.1