On Thu, 16 Jan 2025 11:08:52 +0900, Kunihiko Hayashi
<hayashi.kunihiko@xxxxxxxxxxxxx> wrote:
Tx/Rx FIFO size is specified by the parameter "{tx,rx}-fifo-depth" from
the platform layer.
However, these values are constrained by upper limits determined by the
capabilities of each hardware feature. There is a risk that the upper
bits will be truncated due to the calculation, so it's appropriate to
limit them to the upper limit values.
Patch is fine, but the Fixes: tag is required here.
And if you like to group this patch and the another patch into one series,
it is better to add a cover letter.