Re: [PATCH 1/1] PCI: imx6: Add CONFIG_PCIE_DW_HOST check for suspend/resume

[Bjorn Helgaas]

On Fri, Jan 17, 2025 at 01:07:22PM -0500, Frank Li wrote:
> Add CONFIG_PCIE_DW_HOST check for suspend/resume to avoid build issue
> when CONFIG_PCIE_DW_HOST is not defined but CONFIG_PCIE_DW_EP defined.
> 
> Only host support suspend/resume at i.MX chips.

What would you think of inserting the following patch before
"[PATCH v7 08/10] PCI: imx6: Use dwc common suspend resume method"?

Then we wouldn't need to add #ifdefs in every driver that supports
both RC and EP mode and also supports power management for RC mode.

Bjorn


commit d3b04bf25988 ("PCI: dwc: Add dw_pcie_suspend_noirq(), dw_pcie_resume_noirq() stubs for !CONFIG_PCIE_DW_HOST")
Author: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Date:   Fri Jan 17 15:03:04 2025 -0600

    PCI: dwc: Add dw_pcie_suspend_noirq(), dw_pcie_resume_noirq() stubs for !CONFIG_PCIE_DW_HOST
    
    Previously pcie-designware.h declared dw_pcie_suspend_noirq() and
    dw_pcie_resume_noirq() unconditionally, even though they were only
    implemented when CONFIG_PCIE_DW_HOST was defined.
    
    Add no-op stubs for them when CONFIG_PCIE_DW_HOST is not defined so
    drivers that support both Root Complex and Endpoint modes don't need
    
    Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>


diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 8c0222f019d7..f400f562700e 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -500,9 +500,6 @@ void dw_pcie_iatu_detect(struct dw_pcie *pci);
 int dw_pcie_edma_detect(struct dw_pcie *pci);
 void dw_pcie_edma_remove(struct dw_pcie *pci);
 
-int dw_pcie_suspend_noirq(struct dw_pcie *pci);
-int dw_pcie_resume_noirq(struct dw_pcie *pci);
-
 static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)
 {
 	dw_pcie_write_dbi(pci, reg, 0x4, val);
@@ -680,6 +677,8 @@ static inline enum dw_pcie_ltssm dw_pcie_get_ltssm(struct dw_pcie *pci)
 }
 
 #ifdef CONFIG_PCIE_DW_HOST
+int dw_pcie_suspend_noirq(struct dw_pcie *pci);
+int dw_pcie_resume_noirq(struct dw_pcie *pci);
 irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp);
 int dw_pcie_setup_rc(struct dw_pcie_rp *pp);
 int dw_pcie_host_init(struct dw_pcie_rp *pp);
@@ -688,6 +687,16 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp);
 void __iomem *dw_pcie_own_conf_map_bus(struct pci_bus *bus, unsigned int devfn,
 				       int where);
 #else
+static inline int dw_pcie_suspend_noirq(struct dw_pcie *pci)
+{
+	return 0;
+}
+
+static inline int dw_pcie_resume_noirq(struct dw_pcie *pci)
+{
+	return 0;
+}
+
 static inline irqreturn_t dw_handle_msi_irq(struct dw_pcie_rp *pp)
 {
 	return IRQ_NONE;