[PATCH v3 4/6] mips: dts: ralink: rt3883: update system controller node and its consumers

From: Sergio Paracuellos
Date: Mon Jan 20 2025 - 04:23:35 EST


Current RT3883 device tree file system controller node is wrong since it is
not matching bindings. Hence, update it to match current bindings updating
it also to use new introduced clock constants.

Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx>
---
arch/mips/boot/dts/ralink/rt3883.dtsi | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/arch/mips/boot/dts/ralink/rt3883.dtsi b/arch/mips/boot/dts/ralink/rt3883.dtsi
index 61132cf157e5..11d111a06037 100644
--- a/arch/mips/boot/dts/ralink/rt3883.dtsi
+++ b/arch/mips/boot/dts/ralink/rt3883.dtsi
@@ -1,4 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
+#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
@@ -25,9 +27,11 @@ palmbus@10000000 {
#address-cells = <1>;
#size-cells = <1>;

- sysc@0 {
- compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc";
+ sysc: syscon@0 {
+ compatible = "ralink,rt3883-sysc", "syscon";
reg = <0x0 0x100>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
};

intc: intc@200 {
@@ -50,6 +54,8 @@ uartlite@c00 {
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;

+ clocks = <&sysc RT3883_CLK_UARTLITE>;
+
interrupt-parent = <&intc>;
interrupts = <12>;

--
2.25.1