Re: [RFC PATCH v1 1/3] riscv: dts: starfive: jh7110: add timer node

From: E Shattow
Date: Fri Jan 24 2025 - 06:19:50 EST



On 1/13/25 10:39, Conor Dooley wrote:
On Thu, Jan 02, 2025 at 12:41:21PM -0800, E Shattow wrote:
no idea if this does anything useful; not needed for boot

Signed-off-by: E Shattow <e@xxxxxxxxxxxx>
---
arch/riscv/boot/dts/starfive/jh7110.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)

diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
index 0d8339357bad..0bc922b3ae8a 100644
--- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
@@ -344,6 +344,15 @@ tdm_ext: tdm-ext-clock {
#clock-cells = <0>;
};
+ timer {
+ compatible = "riscv, timer";

compatible has an extra space, so won't do anything!

+ interrupts-extended = <&cpu0_intc 5>,
+ <&cpu1_intc 5>,
+ <&cpu2_intc 5>,
+ <&cpu3_intc 5>,
+ <&cpu4_intc 5>;
+ };
+
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
--
2.45.2


That extra space is my error and does not exist in U-Boot. Good catch! So, when corrected it appears to boot either way with or without and not any change in functionality that I can discern. My priority then for this series is to drop this patch as something unnecessary.

Thanks, Conor!

-E