Re: [PATCH 13/20] perf/x86/intel: Add SSP register support for arch-PEBS

[Liang, Kan]

On 2025-01-24 12:16 a.m., Andi Kleen wrote:
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index f40b03adb5c7..7ed80f01f15d 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -646,6 +646,16 @@ int x86_pmu_hw_config(struct perf_event *event)
>>  			return -EINVAL;
>>  	}
>>  
>> +	/* sample_regs_user never support SSP register. */
>> +	if (unlikely(event->attr.sample_regs_user & BIT_ULL(PERF_REG_X86_SSP)))
>> +		return -EINVAL;
> 
> Why not? It's somewhere.

The current REGS_USER only returns the registers in the struct pt_regs.
The ssp is not part of it. So it is only supported in the REGS_INTR. Is
it enough?

If we want to support ssp with REGS_USER, I think a arch-specific
function should be required early to avoid the perf_sample_regs_user().

Thanks,
Kan