Re: [PATCH v3 3/4] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes
From: Konrad Dybcio
Date: Tue Jan 28 2025 - 06:38:45 EST
On 25.01.2025 4:59 AM, Manikanta Mylavarapu wrote:
> Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices
> found on IPQ5424 platform. The PCIe0 & PCIe1 are 1-lane Gen3
> host whereas PCIe2 & PCIe3 are 2-lane Gen3 host.
>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx>
> ---
> Changes in V3:
> - Replace all instances of ‘0’ with ‘0x0’ wherever applicable in
> PCIe nodes.
> - Place both compatible entries in a single line for each PCIe
> controller node.
> - Global interrupt is defined for each PCIe controller node.
> - Remove all clocks except the RCHNG clock from the assigned-clocks.
> - ICC tag is defined for the interconnect path of each pcie controller
> node.
This one is wrong, please undo..
Konrad