Re: [PATCH] clk: socfpga: clk-pll: Optimize local variables

From: Krzysztof Kozlowski
Date: Wed Jan 29 2025 - 05:27:26 EST


On 14/01/2025 13:14, Thorsten Blum wrote:
> Since readl() returns a u32, the local variables reg and bypass can also
> have the data type u32. Furthermore, divf and divq are derived from reg
> and can also be a u32.
>
> Since do_div() casts the divisor to u32 anyway, changing the data type
> of divq to u32 removes the following Coccinelle/coccicheck warning
> reported by do_div.cocci:
>
> WARNING: do_div() does a 64-by-32 division, please consider using div64_ul instead
>
> Compile-tested only.
>

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>

Best regards,
Krzysztof