Re: [PATCH v4 1/4] arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties

From: Manivannan Sadhasivam
Date: Mon Feb 03 2025 - 09:39:07 EST


On Fri, Jan 24, 2025 at 04:52:47PM +0530, Krishna Chaitanya Chundru wrote:
> Add PCIe lane equalization preset properties for 8 GT/s and 16 GT/s data
> rates used in lane equalization procedure.
>
> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
> ---
> This patch depends on the this dt binding pull request which got recently
> merged: https://github.com/devicetree-org/dt-schema/pull/146
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index a36076e3c56b..6a2074297030 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -2993,6 +2993,10 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
> phys = <&pcie6a_phy>;
> phy-names = "pciephy";
>
> + eq-presets-8gts = /bits/ 16 <0x5555 0x5555>;

Why only 2 entries? Isn't the property supposed to define the preset for all
lanes?

Same below also.

> +

remove newline here.

- Mani

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