Re: [RFC PATCH 1/4] perf: arm_pmuv3: Introduce module param to partition the PMU

From: Colton Lewis
Date: Mon Feb 03 2025 - 16:38:29 EST


Colton Lewis <coltonlewis@xxxxxxxxxx> writes:

Marc Zyngier <maz@xxxxxxxxxx> writes:

On Tue, 28 Jan 2025 22:08:27 +0000,
Colton Lewis <coltonlewis@xxxxxxxxxx> wrote:

>> + bitmap_set(cpu_pmu->cntr_mask, 0, pmcr_n);
>> +
>> + if (reserved_guest_counters > 0 && reserved_guest_counters <
pmcr_n) {
>> + cpu_pmu->hpmn = reserved_guest_counters;
>> + cpu_pmu->partitioned = true;

> Isn't this going to completely explode on a kernel running at EL1?

Trying to access an EL2 register at EL1 can do that. I'll add the
appropriate hypercalls.

Ooohh. Making this work at EL1 is much more complicated than adding the
hypercall to write MDCR because once HPMN takes effect, the upper range
of counters that the host will use is only writable at EL2. That means
using any register related to any counter in the upper range would also
require a hypercall. The only way around that would be to avoid using
this feature in the host entirely and only enable it when we load a
guest.

I know we don't like feature discrepencies between VHE and nVHE mode,
but Oliver thinks it might be justified here to have PMU partitioning be
VHE-only.