Re: [PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the Intel MID record

From: Andy Shevchenko
Date: Tue Feb 04 2025 - 12:38:49 EST

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On Tue, Feb 04, 2025 at 07:01:00PM +0200, Andy Shevchenko wrote:
> Intel MID record is not listed all related files. Add to there
> pin control and GPIO drivers along with HSU (High Speed UART)
> and HSU DMA.

Mika, JFYI, it's supposed to go via Intel pin control tree.

--
With Best Regards,
Andy Shevchenko

Next message: Maciej Wieczor-Retman: "[PATCH 14/15] x86: Make software tag-based kasan available"
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In reply to: Andy Shevchenko: "[PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the Intel MID record"
Next in thread: Mika Westerberg: "Re: [PATCH v1 1/1] MAINTAINERS: Add pin control and GPIO to the Intel MID record"
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