Re: [PATCH 06/20] perf/x86/intel: Initialize architectural PEBS

[Mi, Dapeng]

On 1/28/2025 7:22 PM, Peter Zijlstra wrote:
> On Thu, Jan 23, 2025 at 02:07:07PM +0000, Dapeng Mi wrote:
>
>
>> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
>> index e8a06c8486af..1b33a6a60584 100644
>> --- a/arch/x86/events/intel/ds.c
>> +++ b/arch/x86/events/intel/ds.c
>> @@ -1537,6 +1537,9 @@ void intel_pmu_pebs_enable(struct perf_event *event)
>>  
>>  	cpuc->pebs_enabled |= 1ULL << hwc->idx;
>>  
>> +	if (x86_pmu.arch_pebs)
>> +		return;
>> +
>>  	if ((event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT) && (x86_pmu.version < 5))
>>  		cpuc->pebs_enabled |= 1ULL << (hwc->idx + 32);
>>  	else if (event->hw.flags & PERF_X86_EVENT_PEBS_ST)
>> @@ -1606,6 +1609,11 @@ void intel_pmu_pebs_disable(struct perf_event *event)
>>  
>>  	cpuc->pebs_enabled &= ~(1ULL << hwc->idx);
>>  
>> +	hwc->config |= ARCH_PERFMON_EVENTSEL_INT;
>> +
>> +	if (x86_pmu.arch_pebs)
>> +		return;
>> +
>>  	if ((event->hw.flags & PERF_X86_EVENT_PEBS_LDLAT) &&
>>  	    (x86_pmu.version < 5))
>>  		cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32));
>> @@ -1616,15 +1624,13 @@ void intel_pmu_pebs_disable(struct perf_event *event)
>>  
>>  	if (cpuc->enabled)
>>  		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
>> -
>> -	hwc->config |= ARCH_PERFMON_EVENTSEL_INT;
>>  }
>>  
>>  void intel_pmu_pebs_enable_all(void)
>>  {
>>  	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>>  
>> -	if (cpuc->pebs_enabled)
>> +	if (!x86_pmu.arch_pebs && cpuc->pebs_enabled)
>>  		wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled);
>>  }
>>  
>> @@ -1632,7 +1638,7 @@ void intel_pmu_pebs_disable_all(void)
>>  {
>>  	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>>  
>> -	if (cpuc->pebs_enabled)
>> +	if (!x86_pmu.arch_pebs && cpuc->pebs_enabled)
>>  		__intel_pmu_pebs_disable_all();
>>  }
> So there's a ton of if (arch_pebs) sprinkled around. Can't we avoid that
> by using a few static_call()s ?

Sure. Let me try it.