On Mon, Feb 10, 2025 at 04:49:50PM +0100, Sebastian Ott wrote:
Enable VMMs to write MIDR_EL1 by treating it as a VM ID register.
Since MIDR_EL1 is not handled as a proper arm64_ftr_reg apply only
a sanity check against the writable mask to ensure the reserved
bits are 0.
How exactly does the VMM's MIDR_EL1 find its way to the guest? VPIDR_EL2
is still set to the hardware value.
@@ -2021,7 +2037,11 @@ static int set_id_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
return ret;
}
- ret = arm64_check_features(vcpu, rd, val);
+ if (skip_feature_check(id))
+ ret = arm64_check_mask(rd, val);
+ else
+ ret = arm64_check_features(vcpu, rd, val);
+
Can you add a new implementation of ->set_user() for MIDR/REVIDR/AIDR
instead?
@@ -2542,6 +2571,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_DBGVCR32_EL2), undef_access, reset_val, DBGVCR32_EL2, 0 },
+ { ID_DESC(MIDR_EL1), .set_user = set_id_reg, .visibility = id_visibility,
+ .reset = reset_midr_el1, .val = (u32)-1 },
nit: GENMASK() instead of truncation by casting.