Re: [PATCH] x86/cpu: Add two Intel CPU model numbers

From: Andrew Cooper
Date: Tue Feb 11 2025 - 20:39:29 EST


> @@ -178,4 +180,7 @@ #define INTEL_FAM5_QUARK_X1000 0x09 /* Quark X1000 SoC */
> #define INTEL_QUARK_X1000 IFM(5, 0x09) /* Quark X1000 SoC */
>
> +/* Family 19 */ +#define INTEL_PANTHERCOVE_X IFM(19, 0x01) /* Diamond
> Rapids */

Is it intentional that this is not INTEL_DIAMONDRAPIDS_X like
Sappire/Emerald/Granite ?

I was going to submit a patch, but there are other inconsistencies too;
the Cores and Atoms are mostly the opposite ways around.

Atoms uses the microarchitecture codename with SoC name in the comment.

Cores (starting with SKL where they begin to diverge) use the CPU
codname with the microarchitecture name(s), which matter for hybrid as
there are multiple uarches.

I'd argue that this wants to become INTEL_DIAMONDRAPIDS_X (and CMT/DMT
to SRF/CWF), or all of SPR/EMR/GNR want to turn into GLC/RPC/RWC so
they're consistent when used together.

Thanks,

~Andrew