Re: [PATCH] arm64: dts: socfpga: agilex5: fix gpio0 address

From: Krzysztof Kozlowski
Date: Wed Feb 12 2025 - 10:36:12 EST


On 12/02/2025 11:01, niravkumar.l.rabara@xxxxxxxxx wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
>
> Fix gpio0 controller address for Agilex5.

How do you fix it exactly?

>
> Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> ---
> arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 51c6e19e40b8..9e4ef24c8318 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> @@ -222,7 +222,7 @@ i3c1: i3c@10da1000 {
> status = "disabled";
> };
>
> - gpio0: gpio@ffc03200 {
> + gpio0: gpio@10c03200 {

I see now warning. Are you sure you tested it according to
maintainer-soc-clean-dts profile?

> compatible = "snps,dw-apb-gpio";
> reg = <0xffc03200 0x100>;
> #address-cells = <1>;


Best regards,
Krzysztof