RE: [PATCH net-next] net: xilinx: axienet: Implement BQL

From: Gupta, Suraj
Date: Sat Feb 15 2025 - 06:32:49 EST




> -----Original Message-----
> From: Sean Anderson <sean.anderson@xxxxxxxxx>
> Sent: Saturday, February 15, 2025 2:43 AM
> To: Pandey, Radhey Shyam <radhey.shyam.pandey@xxxxxxx>;
> netdev@xxxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx; Paolo Abeni <pabeni@xxxxxxxxxx>; David S .
> Miller <davem@xxxxxxxxxxxxx>; Jakub Kicinski <kuba@xxxxxxxxxx>; Simek, Michal
> <michal.simek@xxxxxxx>; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; Eric Dumazet
> <edumazet@xxxxxxxxxx>; Andrew Lunn <andrew+netdev@xxxxxxx>; Sean
> Anderson <sean.anderson@xxxxxxxxx>
> Subject: [PATCH net-next] net: xilinx: axienet: Implement BQL
>
> Caution: This message originated from an External Source. Use proper caution
> when opening attachments, clicking links, or responding.
>
>
> Implement byte queue limits to allow queueing disciplines to account for packets
> enqueued in the ring buffers but not yet transmitted.
>

Could you please check if BQL can be implemented for DMAengine flow?

> Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxxx>
> ---
>
> drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> index 0673b2694e4c..7406e00de0fb 100644
> --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> @@ -1002,6 +1002,7 @@ static int axienet_tx_poll(struct napi_struct *napi, int
> budget)
> &size, budget);
>
> if (packets) {
> + netdev_completed_queue(ndev, packets, size);
> u64_stats_update_begin(&lp->tx_stat_sync);
> u64_stats_add(&lp->tx_packets, packets);
> u64_stats_add(&lp->tx_bytes, size); @@ -1125,6 +1126,7 @@
> axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
> if (++new_tail_ptr >= lp->tx_bd_num)
> new_tail_ptr = 0;
> WRITE_ONCE(lp->tx_bd_tail, new_tail_ptr);
> + netdev_sent_queue(ndev, skb->len);
>
> /* Start the transfer */
> axienet_dma_out_addr(lp, XAXIDMA_TX_TDESC_OFFSET, tail_p); @@ -
> 1751,6 +1753,7 @@ static int axienet_stop(struct net_device *ndev)
> dma_release_channel(lp->tx_chan);
> }
>
> + netdev_reset_queue(ndev);
> axienet_iow(lp, XAE_IE_OFFSET, 0);
>
> if (lp->eth_irq > 0)
> @@ -2676,6 +2679,7 @@ static void axienet_dma_err_handler(struct work_struct
> *work)
> ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN));
>
> axienet_dma_stop(lp);
> + netdev_reset_queue(ndev);
>
> for (i = 0; i < lp->tx_bd_num; i++) {
> cur_p = &lp->tx_bd_v[i];
> --
> 2.35.1.1320.gc452695387.dirty
>