Re: [PATCH v2 02/15] clk: sunxi-ng: mp: introduce dual-divider clock

[Chen-Yu Tsai]

On Fri, Feb 14, 2025 at 8:56 PM Andre Przywara <andre.przywara@xxxxxxx> wrote:
>
> The Allwinner A523 SoC introduces some new MP-style mod clock, where the
> second "P" divider is an actual numerical divider value, and not the
> numbers of bits to shift (1..32 instead of 1,2,4,8).
> The rest of the clock is the same as the existing MP clock, so enhance the
> existing code to accommodate for this.
>
> Introduce the new CCU feature bit CCU_FEATURE_DUAL_DIV to mark an MP
> clock as having two dividers, and change the dividing and encoding code
> to differentiate the two cases.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>

Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx>