Re: [PATCH v2] media: verisilicon: Fix AV1 decoder clock frequency
From: Philipp Zabel
Date: Tue Feb 18 2025 - 04:15:33 EST
On Mo, 2025-02-17 at 16:46 -0500, Nicolas Dufresne wrote:
> The desired clock frequency was correctly set to 400MHz in the device tree
> but was lowered by the driver to 300MHz breaking 4K 60Hz content playback.
> Fix the issue by removing the driver call to clk_set_rate(), which reduce
> the amount of board specific code.
>
> Fixes: 003afda97c65 ("media: verisilicon: Enable AV1 decoder on rk3588")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Nicolas Dufresne <nicolas.dufresne@xxxxxxxxxxxxx>
I was going to ask whether there might be any device trees without the
assigned-clock-rates around that this patch could break, but the DT
node was introduced with 400 MHz clock setting in the initial commit
dd6dc0c4c126 ("arm64: dts: rockchip: Add AV1 decoder node to rk3588s").
Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
regards
Philipp