RE: [PATCH v3 6/7] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support

[Fabrizio Castro]

> From: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> Sent: 18 February 2025 23:43
> Subject: [PATCH v3 6/7] dmaengine: sh: rz-dmac: Add RZ/V2H(P) support
> 
> The DMAC IP found on the Renesas RZ/V2H(P) family of SoCs is
> similar to the version found on the Renesas RZ/G2L family of
> SoCs, but there are some differences:
> * It only uses one register area
> * It only uses one clock
> * It only uses one reset
> * Instead of using MID/IRD it uses REQ NO/ACK NO
> * It is connected to the Interrupt Control Unit (ICU)
> * On the RZ/G2L there is only 1 DMAC, on the RZ/V2H(P) there are 5
> 
> Add specific support for the Renesas RZ/V2H(P) family of SoC by
> tackling the aforementioned differences.
> 
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@xxxxxxxxxxx>
> ---
> v2->v3:
> * Dropped change to Kconfig.
> * Replaced rz_dmac_type with has_icu flag.
> * Put req_no and ack_no in an anonymous struct, nested under an
>   anonymous union with mid_rid.
> * Dropped data field of_rz_dmac_match[], and added logic to determine
>   value of has_icu flag from DT parsing.
> v1->v2:
> * Switched to new macros for minimum values.
> ---

[..]

> 
>  static struct dma_chan *rz_dmac_of_xlate(struct of_phandle_args *dma_spec,
> @@ -769,6 +849,8 @@ static int rz_dmac_chan_probe(struct rz_dmac *dmac,
> 
>  	channel->index = index;
>  	channel->mid_rid = -EINVAL;
> +	channel->req_no = RZV2H_ICU_DMAC_REQ_NO_DEFAULT;
> +	channel->ack_no = RZV2H_ICU_DMAC_ACK_NO_DEFAULT;

Actually, this should look like the below now that mid_rid and req_no/ack_no
are mutually exclusive:

if (!dmac->has_icu) {
	channel->mid_rid = -EINVAL;
} else {
	channel->req_no = RZV2H_ICU_DMAC_REQ_NO_DEFAULT;
	channel->ack_no = RZV2H_ICU_DMAC_ACK_NO_DEFAULT;
}

I'll send a new version to address this.

Sorry for the noise.

Cheers,
Fab