Re: [PATCH v2] PCI: Update Resizable BAR Capability Register fields

[Bjorn Helgaas]

On Wed, Feb 19, 2025 at 10:27:12AM +0800, Zhiyuan Dai wrote:
> PCI Express Base Spec r6.0 defines BAR size up to 8 EB (2^63 bytes),
> but supporting anything bigger than 128TB requires changes to pci_rebar_get_possible_sizes()
> to read the additional Capability bits from the Control register.
> 
> Signed-off-by: Zhiyuan Dai <daizhiyuan@xxxxxxxxxxxxxx>
> ---
>  drivers/pci/pci.c             | 14 ++++++++++----
>  include/uapi/linux/pci_regs.h |  3 ++-
>  2 files changed, 12 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 661f98c6c63a..8903deb2d891 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -3752,12 +3752,13 @@ static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
>   * @bar: BAR to query
>   *
>   * Get the possible sizes of a resizable BAR as bitmask defined in the spec
> - * (bit 0=1MB, bit 19=512GB). Returns 0 if BAR isn't resizable.
> + * (bit 0=1MB, bit 43=8EB). Returns 0 if BAR isn't resizable.
>   */
> -u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
> +u64 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)

Callers need to be updated so they're prepared for a u64 instead of a
u32.

If you don't actually need sizes bigger than 128TB right now, it's
fine to keep this as a u32, only add support up to 128TB, and leave
the >128TB support for later.

Bjorn