Re: [PATCH v10 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574

From: Konrad Dybcio
Date: Fri Feb 21 2025 - 06:50:17 EST


On 21.02.2025 11:14 AM, Manikanta Mylavarapu wrote:
> From: Devi Priya <quic_devipriy@xxxxxxxxxxx>
>
> Add Networking Sub System Clock Controller (NSSCC) driver for ipq9574 based
> devices.
>
> Signed-off-by: Devi Priya <quic_devipriy@xxxxxxxxxxx>
> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx>
> ---

[...]

> +static int nss_cc_ipq9574_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + int ret;
> +
> + ret = devm_pm_runtime_enable(&pdev->dev);
> + if (ret)
> + return ret;
> +
> + ret = devm_pm_clk_create(&pdev->dev);
> + if (ret)
> + return ret;
> +
> + ret = pm_clk_add(&pdev->dev, "nsscc");
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret, "Fail to add AHB clock\n");
> +
> + ret = pm_runtime_resume_and_get(&pdev->dev);
> + if (ret)
> + return ret;

if /\ suceeds

> +
> + regmap = qcom_cc_map(pdev, &nss_cc_ipq9574_desc);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);

you return here without pm_runtime_put, which doesn't decrease the refcount
for core to put down the resource

if (IS_ERR(regmap)) {
pm_runtime_put(&pdev->dev);
return PTR_ERR(regmap);
}

instead

Konrad

> +
> + clk_alpha_pll_configure(&ubi32_pll_main, regmap, &ubi32_pll_config);
> +
> + ret = qcom_cc_really_probe(&pdev->dev, &nss_cc_ipq9574_desc, regmap);
> + pm_runtime_put(&pdev->dev);
> +
> + return ret;
> +}
> +
> +static struct platform_driver nss_cc_ipq9574_driver = {
> + .probe = nss_cc_ipq9574_probe,
> + .driver = {
> + .name = "qcom,nsscc-ipq9574",
> + .of_match_table = nss_cc_ipq9574_match_table,
> + .pm = &nss_cc_ipq9574_pm_ops,
> + .sync_state = icc_sync_state,
> + },
> +};
> +
> +module_platform_driver(nss_cc_ipq9574_driver);
> +
> +MODULE_DESCRIPTION("QTI NSS_CC IPQ9574 Driver");
> +MODULE_LICENSE("GPL");